Analog switches are used in various electrical circuits such as: multiplexers, sample-and-hold (S/H) circuits, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and in particular in discrete-time analog systems such as switched-capacitor (SC) and switched-current (SI) circuits.
2.1 An Analog Switch
An analog switch is a controllable two-terminal device as illustrated in FIG. 1. It will typically have two states: an "on-state" and an "off-state." In the on-state, the analog switch should short circuit the two switch terminals, labeled V.sub.in,a and V.sub.in,b in the Figures. In the off-state, the analog switch should disconnect the two switch terminals. In neither state should the analog-switch circuit load the switch terminals. The state of the analog switch is usually controlled by a third terminal: the control terminal, labeled V.sub..PHI. in the Figures.
An analog switch may require power to operate. In that case, a high (V.sub.dd) and a low (V.sub.ss) supply potential must be supplied.
2.2 A MOSFET-Based Switch
MOSFETs (Metal-Oxide-Semiconductor Field-Effect-Transistors), also known as IGFETs (Insulated-Gate Field-Effect-Transistors), are by themselves analog switches. Current can flow between the two switch terminals (the drain and the source terminals) if, and only if, the gate has a sufficiently high potential (for NMOS, i.e. N channel MOSFETS) to form a conductive channel under the gate area.
The stand-alone MOSFET switch is passive, i.e. it does not require external power to perform the switching operation. MOSFET switches are, however, not straightforward to control, because the potential of the control terminal (the gate terminal) must be adjusted relative to the channel potential to obtain linear behavior. A power-consuming circuit is often required to generate an appropriate signal to control the MOSFET-based analog switch.
2.3 Linearizing the MOSFET Switch
A good switch should in its on-state provide conductance that is independent of the signal it is conducting. A MOSFET's drain-to-source conductance is (when the drain-to-source voltage is zero) proportional to the charge accumulated in the channel. As described by C. Enz, K. Krummennacher, and E. Vittoz in Analog Integrated Circuits and Signal Processing, vol. 8, no. 1, July 1995, pp. 83-114, the channel charge has a nonlinear dependence on the relative potentials of all 4 MOSFET terminals: gate, drain, source, and bulk. In the switch's on-state, the drain and source terminals should have essentially the same potential. Hence, the problem is described by only three variables: the gate, channel, and bulk potentials. The channel potential is determined by the signal the switch is conducting, i.e. the switch can be controlled only by adjusting the gate and bulk potentials.
A NMOS requires a minimum gate-to-channel voltage (the threshold voltage), to be able to conduct. If the gate-to-channel voltage is raised beyond this level, the switch's conductance will increase. The threshold voltage is somewhat dependent on the bulk-to-channel voltage. This dependence is often referred to as the "body effect." A PMOS (P-channel MOSFET) has the same behavior, but with the opposite polarity.
To assure that the MOSFET-based analog switch has a reasonably constant (signal-independent) conductance, it is necessary to compensate for the gate-to-channel voltage dependence. Whether or not it is necessary to compensate for the body effect depends on the application, the supply-voltage difference, and other design specifications.
2.3.1 Constant-Overdrive MOSFET Switches
The principle of constant-overdrive MOSFET switches is that the gate-to-drain voltage (or equivalent, the gate-to-source voltage) in the on-state is controlled to a constant value. This technique is described in U.S. Pat. Nos. 3,955,103 and 4,093,874. These circuits are, however, not suitable for implementation as integrated circuits. They require components that are no longer available in standard CMOS technologies, and they need a fairly high supply-voltage difference to operate.
2.3.2 Body-Effect-Compensated MOSFET Switches
The body effect can in many cases be thought off as a second-order effect. However, when the supply-voltage difference (and thereby the feasible overdrive of the MOSFET) is reduced, the body effect will play a more dominant role (due to an only partial depletion of the substrate/body). Some techniques to avoid or compensate for the body effect are known.
A brute-force method would be to use a SOI (silicon-on-insulator) technology. The substrate of such technologies is typically so thin that the body effect is negligible. This option may become relevant for mass-produced systems, but currently it is considered to be an exotic approach.
In a traditional bulk technology, in which the MOSFETs are realized as diffusions in a common substrate, it may be possible to compensate for the body effect. The technique requires that the MOSFET switch is implemented in a separate well. By biasing the well properly, the body effect can be eliminated. This technique is known as the "back-gate" or "switched-tub" technique, and it is taught in U.S. Pat. Nos. 4,473,761 and 4,529,897. An advantage of this technique is that the threshold voltage is held (constant) at its "minimum." Hence, the technique is well-suited for use in low-voltage systems. An idealized version is discussed in the book "Delta-Sigma Data Converters," edited by S. Norsworthy, R. Schreier, and G. Temes, IEEE Press, 1996, FIG. 11.6.
2.3.3 Constant-Overdrive Switches for use in Low-Voltage Systems
The maximum supply-voltage difference permissible for use in last-generation integrated-circuits technologies is scaled down each year. Hence, there is a great demand for an analog switch that can operate with a low supply-voltage difference and that can conduct signals in the rail-to-rail range. The requirement of rail-to-rail operation, combined with the constant-overdrive-MOSFET approach, leads to the conclusion that the gate potential unavoidably must exceed one of the supply rails (for enhancement MOSFETs). Hence, it is necessary to either boost the supply-voltage difference or use a signal-dependent clock booster.
2.4 Prior Art: FIG. 2
The basic principle of operation of a constant-overdrive switch is shown in FIG. 11.7 in the book "Delta-Sigma Data Converters." The figure omits many details, so it has been interpreted. The interpretation is shown in FIG. 2.
The off-state (clock phase .PHI.): The gate terminal of the main switch element, NMOS [34], is connected to the low supply potential V.sub.ss via an internal switch [44]. This assures that the two switch terminals, V.sub.in,a and V.sub.in,b, are not provided a conductive path through the switch [10], assuming that their potentials are higher than the low supply potential V.sub.ss.
The bootstrap capacitor [32] is charged via internal switches [46] and [48], as preparation for use in the on-state. The voltage thereby stored on the bootstrap capacitor will equal the supply-voltage difference EQU V.sub.sup =V.sub.dd -V.sub.ss
The on-state (clock phase .PHI.): The state of the internal switches [40] [42] [44] [46] [48] are all alternated, such that the bootstrap capacitor [32] is coupled between the first switch terminal (V.sub.in,a) and the MOSFET's [34] gate terminal. The bootstrap capacitor [32] does not have a current path to discharge through, so the overdrive of the MOSFET [34] will be constant. Hence, the MOSFET [34] will provide a current path between the two switch terminals, V.sub.in,a and V.sub.in,b, which has an approximately constant conductance.
The bulk terminal of the MOSFET [34] may be connected to the low supply potential V.sub.ss, but to cancel the body effect, it is preferable to connect it to the common node of the internal switches [40] and [48] (as shown in FIG. 2). However, if the analog-switch circuit is implemented in a single-well technology, this configuration may unfortunately not be an option. The problem lies in implementing the internal switches to provide the described operation.
2.4.1 Implementing the Circuit
A simple inspection of the switch [10] shown in FIG. 2 will show that the internal switch [40] has to perform the same switching operation as the analog-switch circuit [10]. They conduct simultaneously, and when conducting they are applied the same signal. An advantage to the analog-witch circuit [10] is that it will provide an constant-conductance connection (due to the constant overdrive of the main MOSFET [34]), even if the internal switch [40] does not. The main requirement to the internal switch [40] is that it must charge the capacitive load constituted by the gate terminal of the MOSFET [34] when the switch [10] is turned on. Providing that this operation occurs fast, the linearity of the internal switch [40] is not important. Hence, there is a minimum requirement to the internal switch's [40] conductance, but not to its linearity. Because the switch [40] is loaded by an only small capacitive load, the required minimum value of its conductance is relaxed. Hence, the concept illustrated in FIG. 2 is good, but only very few implementations of the scheme have been published.
One way to implement a somewhat similar analog-switch circuit is taught by Donald Sauer in U.S Pat. No. 5,500,612. He teaches a technique where the internal switches [42] [44] [46] are replaced by a charging sequence. However, he does not show how to implement the internal switch [40]. This is unfortunate, because it is the implementation of this internal switch [40] that is the main difficulty when designing the analog-switch circuit for operation with a low supply-voltage difference. Other elements of this scheme also require a fairly high supply-voltage difference. Hence, his analog-switch circuit is not suitable for low-voltage applications. It is another disadvantage is that the bootstrap capacitor is charged and discharged in every clock cycle. This mode of operation increases the power consumption, and it requires use of low-impedance internal switches.
2.4.2 Implementing Low-Voltage Switches
As discussed, the internal switch [40] is difficult to implement when the supply-voltage difference is low. The difficulty is due to the required rail-to-rail range operation. When the supply-voltage difference is less than the sum of the NMOS threshold voltage and the absolute value of the PMOS threshold voltage, a standard CMOS transmission-gate analog switch will not be able to conduct signals in the midrange region. To obtain reliable conduction, it is necessary to boost at least one clock signal beyond the supply rails. Simple clock doublers are taught by Nakano, Baba, and Mochizuki in U.S. Pat. No. 4,382,194; by Cho and Gray in Proc. IEEE Custom IC Conf., pp. 23.2.1-23.2.4, May 1994; and by several others. The use of clock doublers is, however, associated with a serious disadvantage:
The gate oxide of a MOSFET switch controlled by a doubled clock signal will have up to twice the supply-voltage difference applied across it. PA1 Large voltages applied across the gate oxide becomes increasingly more unacceptable as the continued down-scaling of the technologies takes place. The ever thinner gate oxide will thereby be subject to a very large electrical field, which will cause an early deterioration or breakdown of the oxide. PA1 The one-clock-phase delay limits the type of applications for which the switch is useful. PA1 The clock booster loads the first switch terminal V.sub.in,a with the bootstrap capacitor(s). To avoid this large capacitive load directly on the input, an analog buffer [68] may be used as isolation. This buffer [68] is, however, power-consuming and difficult to implement when the supply-voltage difference is low. PA1 The main switch element (NMOS [58]) is not compensated for the body effect. Due to the requirement of a separate well for PMOS [56], this feature cannot be implemented in a single-well technology. PA1 1. To provide analog switches that can operate with a supply-voltage difference that is only slightly greater than the threshold voltage. PA1 2. To provide analog switches that can be implemented in a basic CMOS technology. PA1 3. To provide analog switches that can be compensated for the body effect, even when implemented in single-well technologies. PA1 4. To provide analog switches providing signal-independent conductance in the rail-to-rail range. PA1 5. To provide MOSFET-based analog-switch circuits, for which the gate oxides is not subject to voltages that are significantly higher than the supply-voltage difference.
The schematic presented in FIG. 11.7 in the book "Delta-Sigma Data Converters" supposedly represents an analog-switch circuit implemented with internal switches controlled by doubled clock signals. Such circuits can be implemented only in dual-well technologies, and they will be outdated when the gate oxide becomes unable to withstand the thereby applied electric fields.
2.5 Prior Art: FIG. 3
The analog-switch circuit shown in FIG. 3 was presented by Todd L. Brooks during Session FP13.1 at the 1997 IEEE International Solid-State Circuit Conference, and it has since been published in IEEE Journal of Solid-State Circuits, vol. 32, no.12, December 1997.
The analog input signal, applied to the first switch terminal V.sub.in,a, is during the off-state sampled on a bootstrap capacitor [62]. In the transition to the on-state, the potential of the capacitor [62] is shifted upwards by a voltage equal to the supply-voltage difference, and the capacitor terminal with the highest potential is via MOSFET [56] connected to the gate terminal of the MOSFET switch [58]. The overdrive of the MOSFET [58] will be constant only if the input signal V.sub.in,a does not change from the sampling instance (the end of the off-state) and during the on-state. If the supply-voltage difference is only slightly higher than the MOSFET's [58] threshold voltage, even a small change in the MOSFET's [58] overdrive will cause significant relative variation of its conductance. If the analog-switch circuit [10] is used to sample a continuous-time analog signal, the overdrive will not be constant and sampling nonlinearity will result. Even when the supply-voltage difference is fairly high, the analog-switch circuit's [10] performance will suffer greatly if the input signal V.sub.in,a has significant spectral components around the Nyquist frequency. Hence, this analog-switch circuit is not suitable for such purposes. In an oversampled environment, such as the application for which the switch was designed, the above nonidealities may be tolerated.
The disadvantages of the switch shown in FIG. 3 include the following: